The present invention relates to a semiconductor device with air gaps between interconnections and a method of forming the same.
A conventional method of forming a semiconductor device will be described with reference to FIGS. 1A through 1D.
With reference to FIG. 1A, an inter-layer insulator 2 is formed on a bottom level interconnection 1. A first photo-resist film 12 is selectively formed over the inter-layer insulator 2. The inter-layer insulator 2 is then subjected to a dry etching by use of the first photo-resist film 12 as a mask to form trench grooves 7 which provide spaces for later formation process for forming second level interconnections, so that the trench grooves 7 have bottoms which lie over an interface between the first level interconnection 1 and the inter-layer insulator 2.
With reference to FIG. 1B, the first photo-resist film 12 is removed before a second photo-resist film 13 is selectively formed on the inter-layer insulator 2 and within the trench grooves 7 except for a part of the trench groove 7. The inter-layer insulator 2 is further subjected to a further dry etching by use of the second photo-resist film 13 as a mask to form a through hole 8 which reaches the interface between the first level interconnection 1 and the inter-layer insulator 2 so that a part of the first level interconnection 1 is shown through the through hole 8.
With reference to FIG. 1C, the second photo-resist film 13 is removed before a metal film 10 of AlCu is entirely deposited by a high temperature sputtering method so that the metal film 10 extends over the inter-layer insulator 2 as well as within the trench grooves 7 and within the through hole 8.
With reference to FIG. 1D, the metal film 11 is then subjected to a chemical and mechanical polishing for selective removal of the metal film 11, so that the metal film 10 remain only within the trench grooves 7 and the through hole 8, whereby second level interconnections 11 are formed in the trench grooves 7 and a contact layer is formed in the through hole 8. As a result, the second level interconnections 11 are electrically connected through the contact layer to the first level interconnection 1.
The above fabrication processes are so called as Dual-Damascene Process which is effective for scaling down the semiconductor device and realizing quarter-micron design rule without raising a problem with a high cost of manufacturing the semiconductor device due to complicated fabrication processes.
The above Dual-Damascene Process, however, has the following problems. In order to reduce a capacitance between the same level interconnections, it is effective to form an air gap between the same level interconnections. The formation of the air gap between the same level interconnections requires a photo-resist technique. In the conventional fabrication processes, an inter-layer insulator has been formed before the inter-layer insulator is etched to form regions in which interconnections will be formed An adjustment to conditions for forming the inter-layer insulator may prevent formation of the air gap. The air gap is formed as follows. A photo-resist film is formed over the inter-layer insulator. The photo-resist film is then patterned by a photolithography to form a mask. The inter-layer insulator is then subjected to a dry etching by use of the photo-resist film as a mask to form openings for formation of the air gap. The photo-resist film is removed before an insulation film is then formed over the inter-layer insulator and within the openings, thereby to form an air gap. The above processes are additional to the conventional fabrication processes.
In the above circumstances, it had been required to develop a novel method of forming air gaps between the same level interconnections without addition of the photo-resist process so that the air gaps reduce the parasitic capacitance between the interconnections. The reduction in the parasitic capacitance between the interconnections improves high speed performance of the semiconductor device.